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In 2016, Varioscale was awarded a 5-year research contract through IARPA’s research initiative RAVEN with the goal of creating an analysis suite capable of imaging an entire silicon integrated circuit chip down to its minimum-size circuit features. With the next generation of microprocessors entering the sub-10nm size regime, there is an increased demand on tools with the resolution to analyze the smallest features and the scalability to capture entire die layers in a single composite image.

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Varioscale’s involvement in the RAVEN program aims to position the company as a leader in both sample preparation and imaging for next-gen silicon integrated circuit failure analysis and process verification

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Learn more about RAVEN and IARPA by clicking here!

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